Defines | |
| #define | ENCODER_NAMESPACE_START |
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| #define | ENCODER_NAMESPACE_END |
| #define | COUNTOF(a) (sizeof(a)/sizeof(a[0])) |
| Number of items in an array. | |
| #define | REG_STACK RegName_ESP |
| #define | REG_MAX RegName_EDI |
| #define | MAX_REGS 8 |
| #define | STACK_SLOT_SIZE (sizeof(void*)) |
| A number of bytes 'eaten' by an ordinary PUSH/POP. | |
| #define | JMP_TARGET_ALIGMENT (16) |
| A recommended by Intel Arch Manual aligment for instructions that are targets for jmps. | |
| #define | MAX_NATIVE_INST_SIZE (15) |
| A maximum possible size of native instruction. | |
| #define | REGNAME(k, s, i) ( ((k & OpndKind_Any)<<24) | ((s & OpndSize_Any)<<16) | (i&0xFF) ) |
| #define | CCM(prefix, cond) Mnemonic_##prefix##cond=Mnemonic_##prefix##cc+ConditionMnemonic_##cond |
Enumerations | |
| enum | OpndKind { OpndKind_Null = 0, OpndKind_GPReg = 0x01, OpndKind_MinRegKind = OpndKind_GPReg, OpndKind_SReg = 0x02, OpndKind_FPReg = 0x04, OpndKind_XMMReg = 0x08, OpndKind_OtherReg = 0x10, OpndKind_StatusReg = OpndKind_OtherReg, OpndKind_MaxRegKind = OpndKind_StatusReg, OpndKind_MaxReg, OpndKind_Immediate = 0x20, OpndKind_Imm = OpndKind_Immediate, OpndKind_Memory = 0x40, OpndKind_Mem = OpndKind_Memory, OpndKind_Reg = 0x1F, OpndKind_Any = 0x7F, OpndKind_GPReg_Mem = OpndKind_GPReg|OpndKind_Mem, OpndKind_XMMReg_Mem = OpndKind_XMMReg|OpndKind_Mem } |
| The enum OpndKind describes an operand's location - memory, immediate or a register. More... | |
| enum | OpndSize { OpndSize_Null = 0, OpndSize_8 = 0x01, OpndSize_16 = 0x02, OpndSize_32 = 0x04, OpndSize_64 = 0x08, OpndSize_80 = 0x10, OpndSize_128 = 0x20, OpndSize_Max, OpndSize_Any = 0xFF, OpndSize_Default = OpndSize_Any } |
| enum | OpndRole { OpndRole_Null = 0, OpndRole_Use = 0x1, OpndRole_Def = 0x2, OpndRole_UseDef = OpndRole_Use|OpndRole_Def, OpndRole_All = 0xffff } |
| enum OpndRole defines the role of an operand in an instruction Can be used as mask to combine def and use. More... | |
| enum | RegName { RegName_Null = 0, RegName_EAX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_ECX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_EDX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_EBX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_ESP = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_EBP = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_ESI = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_EDI = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_AX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_CX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_DX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_BX = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_SP = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_BP = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_SI = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_DI = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_AL = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_CL = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_DL = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_BL = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_AH = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_CH = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_DH = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_BH = ( (( OpndKind_GPReg & OpndKind_Any)<<24) | (( OpndSize_8 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_ES = ( (( OpndKind_SReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_CS = ( (( OpndKind_SReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_SS = ( (( OpndKind_SReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_DS = ( (( OpndKind_SReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_FS = ( (( OpndKind_SReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_GS = ( (( OpndKind_SReg & OpndKind_Any)<<24) | (( OpndSize_16 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_EFLAGS = ( (( OpndKind_StatusReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_FP0 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_FP1 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_FP2 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_FP3 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_FP4 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_FP5 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_FP6 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_FP7 = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_80 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_FP0S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_FP1S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_FP2S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_FP3S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_FP4S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_FP5S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_FP6S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_FP7S = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_FP0D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_FP1D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_FP2D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_FP3D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_FP4D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_FP5D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_FP6D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_FP7D = ( (( OpndKind_FPReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_XMM0 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_XMM1 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_XMM2 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_XMM3 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_XMM4 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_XMM5 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_XMM6 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_XMM7 = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_128 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_XMM0S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_XMM1S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_XMM2S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_XMM3S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_XMM4S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_XMM5S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_XMM6S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_XMM7S = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_32 & OpndSize_Any)<<16) | ( 7 &0xFF) ), RegName_XMM0D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 0 &0xFF) ), RegName_XMM1D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 1 &0xFF) ), RegName_XMM2D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 2 &0xFF) ), RegName_XMM3D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 3 &0xFF) ), RegName_XMM4D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 4 &0xFF) ), RegName_XMM5D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 5 &0xFF) ), RegName_XMM6D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 6 &0xFF) ), RegName_XMM7D = ( (( OpndKind_XMMReg & OpndKind_Any)<<24) | (( OpndSize_64 & OpndSize_Any)<<16) | ( 7 &0xFF) ) } |
| enum | ConditionMnemonic { ConditionMnemonic_O = 0, ConditionMnemonic_NO = 1, ConditionMnemonic_B = 2, ConditionMnemonic_NAE = ConditionMnemonic_B, ConditionMnemonic_C = ConditionMnemonic_B, ConditionMnemonic_NB = 3, ConditionMnemonic_AE = ConditionMnemonic_NB, ConditionMnemonic_NC = ConditionMnemonic_NB, ConditionMnemonic_Z = 4, ConditionMnemonic_E = ConditionMnemonic_Z, ConditionMnemonic_NZ = 5, ConditionMnemonic_NE = ConditionMnemonic_NZ, ConditionMnemonic_BE = 6, ConditionMnemonic_NA = ConditionMnemonic_BE, ConditionMnemonic_NBE = 7, ConditionMnemonic_A = ConditionMnemonic_NBE, ConditionMnemonic_S = 8, ConditionMnemonic_NS = 9, ConditionMnemonic_P = 10, ConditionMnemonic_PE = ConditionMnemonic_P, ConditionMnemonic_NP = 11, ConditionMnemonic_PO = ConditionMnemonic_NP, ConditionMnemonic_L = 12, ConditionMnemonic_NGE = ConditionMnemonic_L, ConditionMnemonic_NL = 13, ConditionMnemonic_GE = ConditionMnemonic_NL, ConditionMnemonic_LE = 14, ConditionMnemonic_NG = ConditionMnemonic_LE, ConditionMnemonic_NLE = 15, ConditionMnemonic_G = ConditionMnemonic_NLE, ConditionMnemonic_Count = 16 } |
| Conditional mnemonics. More... | |
| enum | Mnemonic { Mnemonic_NULL = 0, Mnemonic_Null = Mnemonic_NULL, Mnemonic_ADC, Mnemonic_ADD, Mnemonic_ADDSD, Mnemonic_ADDSS, Mnemonic_AND, Mnemonic_BSF, Mnemonic_BSR, Mnemonic_CALL, Mnemonic_CMC, Mnemonic_CWD, Mnemonic_CDQ = Mnemonic_CWD, Mnemonic_CMOVcc, Mnemonic_CMOVO = Mnemonic_CMOVcc+ConditionMnemonic_O, Mnemonic_CMOVNO = Mnemonic_CMOVcc+ConditionMnemonic_NO, Mnemonic_CMOVB = Mnemonic_CMOVcc+ConditionMnemonic_B, Mnemonic_CMOVNAE = Mnemonic_CMOVcc+ConditionMnemonic_NAE, Mnemonic_CMOVC = Mnemonic_CMOVcc+ConditionMnemonic_C, Mnemonic_CMOVNB = Mnemonic_CMOVcc+ConditionMnemonic_NB, Mnemonic_CMOVAE = Mnemonic_CMOVcc+ConditionMnemonic_AE, Mnemonic_CMOVNC = Mnemonic_CMOVcc+ConditionMnemonic_NC, Mnemonic_CMOVZ = Mnemonic_CMOVcc+ConditionMnemonic_Z, Mnemonic_CMOVE = Mnemonic_CMOVcc+ConditionMnemonic_E, Mnemonic_CMOVNZ = Mnemonic_CMOVcc+ConditionMnemonic_NZ, Mnemonic_CMOVNE = Mnemonic_CMOVcc+ConditionMnemonic_NE, Mnemonic_CMOVBE = Mnemonic_CMOVcc+ConditionMnemonic_BE, Mnemonic_CMOVNA = Mnemonic_CMOVcc+ConditionMnemonic_NA, Mnemonic_CMOVNBE = Mnemonic_CMOVcc+ConditionMnemonic_NBE, Mnemonic_CMOVA = Mnemonic_CMOVcc+ConditionMnemonic_A, Mnemonic_CMOVS = Mnemonic_CMOVcc+ConditionMnemonic_S, Mnemonic_CMOVNS = Mnemonic_CMOVcc+ConditionMnemonic_NS, Mnemonic_CMOVP = Mnemonic_CMOVcc+ConditionMnemonic_P, Mnemonic_CMOVPE = Mnemonic_CMOVcc+ConditionMnemonic_PE, Mnemonic_CMOVNP = Mnemonic_CMOVcc+ConditionMnemonic_NP, Mnemonic_CMOVPO = Mnemonic_CMOVcc+ConditionMnemonic_PO, Mnemonic_CMOVL = Mnemonic_CMOVcc+ConditionMnemonic_L, Mnemonic_CMOVNGE = Mnemonic_CMOVcc+ConditionMnemonic_NGE, Mnemonic_CMOVNL = Mnemonic_CMOVcc+ConditionMnemonic_NL, Mnemonic_CMOVGE = Mnemonic_CMOVcc+ConditionMnemonic_GE, Mnemonic_CMOVLE = Mnemonic_CMOVcc+ConditionMnemonic_LE, Mnemonic_CMOVNG = Mnemonic_CMOVcc+ConditionMnemonic_NG, Mnemonic_CMOVNLE = Mnemonic_CMOVcc+ConditionMnemonic_NLE, Mnemonic_CMOVG = Mnemonic_CMOVcc+ConditionMnemonic_G, Mnemonic_CMP, Mnemonic_CMPXCHG, Mnemonic_CMPXCHG8B, Mnemonic_CMPSB, Mnemonic_CMPSW, Mnemonic_CMPSD, Mnemonic_CVTSD2SS, Mnemonic_CVTSD2SI, Mnemonic_CVTTSD2SI, Mnemonic_CVTSS2SD, Mnemonic_CVTSS2SI, Mnemonic_CVTTSS2SI, Mnemonic_CVTSI2SD, Mnemonic_CVTSI2SS, Mnemonic_COMISD, Mnemonic_COMISS, Mnemonic_DEC, Mnemonic_DIVSD, Mnemonic_DIVSS, Mnemonic_ENTER, Mnemonic_FLDCW, Mnemonic_FADDP, Mnemonic_FLDZ, Mnemonic_FADD, Mnemonic_FSUBP, Mnemonic_FSUB, Mnemonic_FMUL, Mnemonic_FMULP, Mnemonic_FDIVP, Mnemonic_FDIV, Mnemonic_FUCOMPP, Mnemonic_FRNDINT, Mnemonic_FNSTCW, Mnemonic_FSTSW, Mnemonic_FNSTSW, Mnemonic_FILD, Mnemonic_FLD, Mnemonic_FCLEX, Mnemonic_FCHS, Mnemonic_FNCLEX, Mnemonic_FIST, Mnemonic_FISTP, Mnemonic_FISTTP, Mnemonic_FPREM, Mnemonic_FPREM1, Mnemonic_FST, Mnemonic_FSTP, Mnemonic_XCHG, Mnemonic_DIV, Mnemonic_IDIV, Mnemonic_MUL, Mnemonic_IMUL, Mnemonic_INC, Mnemonic_INT3, Mnemonic_Jcc, Mnemonic_JO = Mnemonic_Jcc+ConditionMnemonic_O, Mnemonic_JNO = Mnemonic_Jcc+ConditionMnemonic_NO, Mnemonic_JB = Mnemonic_Jcc+ConditionMnemonic_B, Mnemonic_JNAE = Mnemonic_Jcc+ConditionMnemonic_NAE, Mnemonic_JC = Mnemonic_Jcc+ConditionMnemonic_C, Mnemonic_JNB = Mnemonic_Jcc+ConditionMnemonic_NB, Mnemonic_JAE = Mnemonic_Jcc+ConditionMnemonic_AE, Mnemonic_JNC = Mnemonic_Jcc+ConditionMnemonic_NC, Mnemonic_JZ = Mnemonic_Jcc+ConditionMnemonic_Z, Mnemonic_JE = Mnemonic_Jcc+ConditionMnemonic_E, Mnemonic_JNZ = Mnemonic_Jcc+ConditionMnemonic_NZ, Mnemonic_JNE = Mnemonic_Jcc+ConditionMnemonic_NE, Mnemonic_JBE = Mnemonic_Jcc+ConditionMnemonic_BE, Mnemonic_JNA = Mnemonic_Jcc+ConditionMnemonic_NA, Mnemonic_JNBE = Mnemonic_Jcc+ConditionMnemonic_NBE, Mnemonic_JA = Mnemonic_Jcc+ConditionMnemonic_A, Mnemonic_JS = Mnemonic_Jcc+ConditionMnemonic_S, Mnemonic_JNS = Mnemonic_Jcc+ConditionMnemonic_NS, Mnemonic_JP = Mnemonic_Jcc+ConditionMnemonic_P, Mnemonic_JPE = Mnemonic_Jcc+ConditionMnemonic_PE, Mnemonic_JNP = Mnemonic_Jcc+ConditionMnemonic_NP, Mnemonic_JPO = Mnemonic_Jcc+ConditionMnemonic_PO, Mnemonic_JL = Mnemonic_Jcc+ConditionMnemonic_L, Mnemonic_JNGE = Mnemonic_Jcc+ConditionMnemonic_NGE, Mnemonic_JNL = Mnemonic_Jcc+ConditionMnemonic_NL, Mnemonic_JGE = Mnemonic_Jcc+ConditionMnemonic_GE, Mnemonic_JLE = Mnemonic_Jcc+ConditionMnemonic_LE, Mnemonic_JNG = Mnemonic_Jcc+ConditionMnemonic_NG, Mnemonic_JNLE = Mnemonic_Jcc+ConditionMnemonic_NLE, Mnemonic_JG = Mnemonic_Jcc+ConditionMnemonic_G, Mnemonic_JMP, Mnemonic_LEA, Mnemonic_LEAVE, Mnemonic_LOOP, Mnemonic_LOOPE, Mnemonic_LOOPNE, Mnemonic_LOOPNZ = Mnemonic_LOOPNE, Mnemonic_LAHF, Mnemonic_MOV, Mnemonic_MOVD, Mnemonic_MOVQ, Mnemonic_MOVS8, Mnemonic_MOVS16, Mnemonic_MOVS32, Mnemonic_MOVS64, Mnemonic_MOVSD, Mnemonic_MOVSS, Mnemonic_MOVSX, Mnemonic_MOVZX, Mnemonic_MULSD, Mnemonic_MULSS, Mnemonic_NEG, Mnemonic_NOP, Mnemonic_NOT, Mnemonic_OR, Mnemonic_PREFETCH, Mnemonic_PXOR, Mnemonic_POP, Mnemonic_POPFD, Mnemonic_PUSH, Mnemonic_PUSHFD, Mnemonic_RET, Mnemonic_SETcc, Mnemonic_SETO = Mnemonic_SETcc+ConditionMnemonic_O, Mnemonic_SETNO = Mnemonic_SETcc+ConditionMnemonic_NO, Mnemonic_SETB = Mnemonic_SETcc+ConditionMnemonic_B, Mnemonic_SETNAE = Mnemonic_SETcc+ConditionMnemonic_NAE, Mnemonic_SETC = Mnemonic_SETcc+ConditionMnemonic_C, Mnemonic_SETNB = Mnemonic_SETcc+ConditionMnemonic_NB, Mnemonic_SETAE = Mnemonic_SETcc+ConditionMnemonic_AE, Mnemonic_SETNC = Mnemonic_SETcc+ConditionMnemonic_NC, Mnemonic_SETZ = Mnemonic_SETcc+ConditionMnemonic_Z, Mnemonic_SETE = Mnemonic_SETcc+ConditionMnemonic_E, Mnemonic_SETNZ = Mnemonic_SETcc+ConditionMnemonic_NZ, Mnemonic_SETNE = Mnemonic_SETcc+ConditionMnemonic_NE, Mnemonic_SETBE = Mnemonic_SETcc+ConditionMnemonic_BE, Mnemonic_SETNA = Mnemonic_SETcc+ConditionMnemonic_NA, Mnemonic_SETNBE = Mnemonic_SETcc+ConditionMnemonic_NBE, Mnemonic_SETA = Mnemonic_SETcc+ConditionMnemonic_A, Mnemonic_SETS = Mnemonic_SETcc+ConditionMnemonic_S, Mnemonic_SETNS = Mnemonic_SETcc+ConditionMnemonic_NS, Mnemonic_SETP = Mnemonic_SETcc+ConditionMnemonic_P, Mnemonic_SETPE = Mnemonic_SETcc+ConditionMnemonic_PE, Mnemonic_SETNP = Mnemonic_SETcc+ConditionMnemonic_NP, Mnemonic_SETPO = Mnemonic_SETcc+ConditionMnemonic_PO, Mnemonic_SETL = Mnemonic_SETcc+ConditionMnemonic_L, Mnemonic_SETNGE = Mnemonic_SETcc+ConditionMnemonic_NGE, Mnemonic_SETNL = Mnemonic_SETcc+ConditionMnemonic_NL, Mnemonic_SETGE = Mnemonic_SETcc+ConditionMnemonic_GE, Mnemonic_SETLE = Mnemonic_SETcc+ConditionMnemonic_LE, Mnemonic_SETNG = Mnemonic_SETcc+ConditionMnemonic_NG, Mnemonic_SETNLE = Mnemonic_SETcc+ConditionMnemonic_NLE, Mnemonic_SETG = Mnemonic_SETcc+ConditionMnemonic_G, Mnemonic_SAL, Mnemonic_SHL = Mnemonic_SAL, Mnemonic_SAR, Mnemonic_ROR, Mnemonic_RCR, Mnemonic_ROL, Mnemonic_RCL, Mnemonic_SHR, Mnemonic_SHRD, Mnemonic_SHLD, Mnemonic_SBB, Mnemonic_SUB, Mnemonic_SUBSD, Mnemonic_SUBSS, Mnemonic_TEST, Mnemonic_UCOMISD, Mnemonic_UCOMISS, Mnemonic_XOR, Mnemonic_XORPD, Mnemonic_XORPS, Mnemonic_CVTDQ2PD, Mnemonic_CVTTPD2DQ, Mnemonic_CVTDQ2PS, Mnemonic_CVTTPS2DQ, Mnemonic_STD, Mnemonic_CLD, Mnemonic_SCAS, Mnemonic_STOS, Mnemonic_WAIT, Mnemonic_Count } |
| enum | InstPrefix { InstPrefix_Null = 0, InstPrefix_LOCK = 0xF0, InstPrefix_REPNE = 0xF2, InstPrefix_REPNZ = InstPrefix_REPNE, InstPrefix_REP = 0xF3, InstPrefix_REPZ = InstPrefix_REP, InstPrefix_CS = 0x2E, InstPrefix_SS = 0x36, InstPrefix_DS = 0x3E, InstPrefix_ES = 0x26, InstPrefix_FS = 0x64, InstPrefix_GS = 0x65, InstPrefix_HintTaken = 0x3E, InstPrefix_HintNotTaken = 0x2E, InstPrefix_OpndSize = 0x66, InstPrefix_AddrSize = 0x67 } |
| Instruction prefixes, according to arch manual. More... | |
Functions | |
| unsigned | getSizeBytes (OpndSize sz) |
| bool | isRegKind (OpndKind kind) |
| RegName | getRegName (const char *regname) |
| Returns RegName for a given name. | |
| RegName | getRegName (OpndKind k, OpndSize s, int idx) |
| Constructs RegName from the given OpndKind, size and index. | |
| unsigned | getRegMask (RegName reg) |
| Extracts a bit mask with a bit set at the position of the register's index. | |
| OpndKind | getRegKind (RegName reg) |
| Extracts RegKind from the RegName. | |
| OpndSize | getRegSize (RegName reg) |
| Extracts OpndSize from RegName. | |
| unsigned char | getRegIndex (RegName reg) |
| Extracts an index from the given RegName. | |
| const char * | getRegNameString (RegName reg) |
| Returns a string name of the given RegName. | |
| const char * | getOpndSizeString (OpndSize size) |
| Returns string name of a given OpndSize. | |
| OpndSize | getOpndSize (const char *sizeString) |
| Returns OpndSize passed by its string representation (case insensitive). | |
| const char * | getOpndKindString (OpndKind kind) |
| Returns string name of a given OpndKind. | |
| OpndKind | getOpndKind (const char *kindString) |
| Returns OpndKind found by its string representation (case insensitive). | |
| const char * | getConditionString (ConditionMnemonic cm) |
| RegName | getAliasReg (RegName reg, OpndSize sz) |
| Constructs an RegName with the same index and kind, but with a different size from the given RegName (i.e. | |
| bool | equals (RegName r0, RegName r1) |
| brief Tests two RegName-s of the same kind for equality. | |
| #define ENCODER_NAMESPACE_START |
Astapchuk
| #define ENCODER_NAMESPACE_END |
| #define COUNTOF | ( | a | ) | (sizeof(a)/sizeof(a[0])) |
Number of items in an array.
| #define REG_STACK RegName_ESP |
| #define REG_MAX RegName_EDI |
| #define MAX_REGS 8 |
| #define STACK_SLOT_SIZE (sizeof(void*)) |
A number of bytes 'eaten' by an ordinary PUSH/POP.
| #define JMP_TARGET_ALIGMENT (16) |
A recommended by Intel Arch Manual aligment for instructions that are targets for jmps.
| #define MAX_NATIVE_INST_SIZE (15) |
A maximum possible size of native instruction.
| #define REGNAME | ( | k, | |||
| s, | |||||
| i | ) | ( ((k & OpndKind_Any)<<24) | ((s & OpndSize_Any)<<16) | (i&0xFF) ) |
| #define CCM | ( | prefix, | |||
| cond | ) | Mnemonic_##prefix##cond=Mnemonic_##prefix##cc+ConditionMnemonic_##cond |
| enum OpndKind |
The enum OpndKind describes an operand's location - memory, immediate or a register.
It can be used as a bit mask.
| enum OpndSize |
| enum OpndRole |
enum OpndRole defines the role of an operand in an instruction Can be used as mask to combine def and use.
The complete def+use info can be combined in 2 bits which is used, say in Encoder.OpndRole.
| enum RegName |
| enum ConditionMnemonic |
Conditional mnemonics.
The values match the 'real' (==processor's) values of the appropriate condition values used in the opcodes.
| enum Mnemonic |
| enum InstPrefix |
Instruction prefixes, according to arch manual.
| unsigned getSizeBytes | ( | OpndSize | sz | ) |
| bool isRegKind | ( | OpndKind | kind | ) |
| RegName getRegName | ( | const char * | regname | ) |
Returns RegName for a given name.
Name is case-insensitive.
| regname | - string name of a register |
Constructs RegName from the given OpndKind, size and index.
| unsigned getRegMask | ( | RegName | reg | ) |
Extracts a bit mask with a bit set at the position of the register's index.
| unsigned char getRegIndex | ( | RegName | reg | ) |
Extracts an index from the given RegName.
| const char* getRegNameString | ( | RegName | reg | ) |
Returns a string name of the given RegName.
The name returned is in upper-case. Returns NULL if invalid RegName specified.
| const char* getOpndSizeString | ( | OpndSize | size | ) |
Returns string name of a given OpndSize.
Returns NULL if invalid OpndSize passed.
| OpndSize getOpndSize | ( | const char * | sizeString | ) |
Returns OpndSize passed by its string representation (case insensitive).
Returns OpndSize_Null if invalid string specified. The 'sizeString' can not be NULL.
| const char* getOpndKindString | ( | OpndKind | kind | ) |
Returns string name of a given OpndKind.
Returns NULL if the passed kind is invalid.
| OpndKind getOpndKind | ( | const char * | kindString | ) |
Returns OpndKind found by its string representation (case insensitive).
Returns OpndKind_Null if the name is invalid. The 'kindString' can not be NULL.
| const char* getConditionString | ( | ConditionMnemonic | cm | ) |
Constructs an RegName with the same index and kind, but with a different size from the given RegName (i.e.
getRegAlias(EAX, OpndSize_16) => AX; getRegAlias(BL, OpndSize_32) => EBX). The constructed RegName is not checked in any way and thus may be invalid. Note, that the aliasing does not work for at least AH,BH,CH,DH, ESI, EDI, ESP and EBP regs.
brief Tests two RegName-s of the same kind for equality.
Genereated on Tue Mar 11 19:25:41 2008 by Doxygen.
(c) Copyright 2005, 2008 The Apache Software Foundation or its licensors, as applicable.